ATOM
Also known as AMD ATOM, ATOMesh
In plain English
ATOM is AMD’s own inference engine, its answer to a vendor runtime rather than an upstream open-source one.
Technical definition
ATOM is AMD’s inference engine for Instinct accelerators, positioned as the vendor runtime alongside upstream vLLM and SGLang on ROCm.
Engineering details
It occupies the same role for AMD that a vendor runtime does for NVIDIA: tuned for the vendor’s own hardware and free to move ahead of upstream engines. Its router, ATOMesh, began as a fork of the SGLang router. The engine was built for single-turn serving, so long-context multi-turn support required substantial changes to its cache manager and kernels.
Why it matters
A vendor engine can show what silicon is capable of before the open stack catches up, which makes it useful evidence and awkward guidance at the same time. Most labs deploy upstream engines, so a result that exists only under a vendor runtime does not describe what those users will get.
How to read it in InferenceX
InferenceX reports ATOM as its own framework label so it is never conflated with a vLLM or SGLang result on the same accelerator. Compare it to other vendor runtimes when asking what the hardware can do, and to upstream engines when asking what a customer can deploy today.
Source material
See the concept in real benchmarks
AgentX - InferenceXv3: Does the CUDA Moat Hold Up in Agentic Inferencing?
$3 Million USD dataset open sourced, 1 Mil+ Context Length, Multiturn, Sub Agents 95%+ KVCache HitRate, GB300 NVL72, MI355X, B200
MI355X DeepSeek-V4-Pro on SGLang: 110.5x Throughput per GPU in 26 Days
The amd/deepseek_v4 side branch shipped TileLang attention indexer, Triton sparse MLA, fused RoPE/Hadamard, FlyDSL MoE, and FP4 weights across 31 performance optimizations PRs — lifting first-light 20 tok/s/GPU at 2.4 tok/s/user into 2,256 tok/s/GPU at 9.4 tok/s/user on 8K/1K, with both throughput and interactivity climbing together
AMD MI355X GLM-5 Inference: Up to 40% Cheaper per Million Tokens than B200 on SGLang FP8
14 weeks after GLM-5 launched, AMD landed both MTP and non-MTP SGLang FP8 recipes on MI355X — fused MLA + FP8 KV cache via TileLang flips the single-node FP8 cost curve in AMD favor across most of the performance Pareto