Head-to-head AI inference benchmark comparison of H100 (NVIDIA Hopper) and MI300X (AMD CDNA 3) on Qwen 3.5 397B-A17B. Latency, throughput, and cost across LLM workloads. Use the chart controls below to switch sequences, precisions, and metrics — same interactions as the main inference chart.
AgentX replays real coding-agent sessions rather than fixed-length prompts, so context grows turn over turn and most of each request is served from cache instead of being recomputed. That turns the comparison into a systems question: KV transfer between nodes, prefix-aware routing, and cache capacity all move the curve alongside raw chip throughput. Fixed-sequence workloads stay the clean baseline for kernel and silicon performance, so the two scenarios answer different questions about the same hardware. Learn more about AgentX →
H100 posts 6053 tok/s/chip for $0.05 per million tokens at 60 tok/s/user on Qwen 3.5 397B-A17B; MI300X posts 713 tok/s/chip for $0.37. H100 is 590% cheaper per token; H100 delivers 749% more tok/s/chip.
Throughput at 116 tok/s/user on Qwen 3.5 397B-A17B: H100 hits 3818 tok/s/chip, MI300X hits 713. Per-million costs land at $0.09 and $0.37 respectively. H100 is 335% cheaper per token; H100 delivers 436% more tok/s/chip.
H100 / MI300X on Qwen 3.5 397B-A17B at 172 tok/s/user: 2598 / 713 tok/s/chip, $0.13 / $0.37 per million tokens. H100 is 196% cheaper per token; H100 delivers 265% more tok/s/chip. (Numbers reflect the default agentic-traces · fp8 selection for this URL — table and chart below update if you change sequence, precision, or model in the controls.)
| Metric | Interactivity (tok/s/user) | Interactivity (tok/s/user) | Interactivity (tok/s/user) |
|---|---|---|---|
| Throughput (tok/s/chip) | H100:6052.8MI300X:712.6 | H100:3818.2MI300X:712.6 | H100:2598.5MI300X:712.6 |
| Cost ($/M tok) | H100:$0.054MI300X:$0.370 | H100:$0.085MI300X:$0.370 | H100:$0.125MI300X:$0.370 |
| tok/s/MW | H100:4418126MI300X:512683 | H100:2787024MI300X:512683 | H100:1896699MI300X:512683 |
| Concurrency | H100:~12MI300X:~4 | H100:~7MI300X:~4 | H100:~4MI300X:~4 |
Agentic inference metrics from the AgentX scenario and fixed-sequence inference metrics across models, hardware configurations, and serving parameters.
TCO $/chip/hr:
Source: SemiAnalysis Market July 2026 Pricing Surveys & AI Cloud TCO Model
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate cost per million tokens per decode chip or per prefill chip, rather than per total chip count. This makes direct token cost comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate input throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct input throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate output throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct output throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate power per decode chip or per prefill chip, rather than per total chip count. This makes direct power comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate Joules per decode chip or per prefill chip, rather than per total chip count. This makes direct Joules per token comparison with aggregated configs not an apples-to-apples comparison.
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