Head-to-head AI inference benchmark comparison of H200 (NVIDIA Hopper) and RTX PRO 6000 (NVIDIA Blackwell) on Qwen 3.5 397B-A17B. Latency, throughput, and cost across LLM workloads. Use the chart controls below to switch sequences, precisions, and metrics — same interactions as the main inference chart.
AgentX replays real coding-agent sessions rather than fixed-length prompts, so context grows turn over turn and most of each request is served from cache instead of being recomputed. That turns the comparison into a systems question: KV transfer between nodes, prefix-aware routing, and cache capacity all move the curve alongside raw chip throughput. Fixed-sequence workloads stay the clean baseline for kernel and silicon performance, so the two scenarios answer different questions about the same hardware. Learn more about AgentX →
H200: 8236 tok/s/chip, $0.04 per million tokens at 97 tok/s/user on Qwen 3.5 397B-A17B. RTX PRO 6000 is unmeasured here.
At 142 tok/s/user on Qwen 3.5 397B-A17B, H200 delivers 5515 tok/s/chip at $0.06 per million tokens; RTX PRO 6000 hasn't been benchmarked at this target.
H200 hits 3033 tok/s/chip for $0.11 per million tokens at 187 tok/s/user on Qwen 3.5 397B-A17B. No RTX PRO 6000 data at this operating point. (Numbers reflect the default agentic-traces · fp8 selection for this URL — table and chart below update if you change sequence, precision, or model in the controls.)
| Metric | Interactivity (tok/s/user) | Interactivity (tok/s/user) | Interactivity (tok/s/user) |
|---|---|---|---|
| Throughput (tok/s/chip) | H200:8236.1RTX PRO 6000:— | H200:5515.3RTX PRO 6000:— | H200:3032.7RTX PRO 6000:— |
| Cost ($/M tok) | H200:$0.041RTX PRO 6000:— | H200:$0.061RTX PRO 6000:— | H200:$0.112RTX PRO 6000:— |
| tok/s/MW | H200:6011752RTX PRO 6000:— | H200:4025740RTX PRO 6000:— | H200:2213642RTX PRO 6000:— |
| Concurrency | H200:~13RTX PRO 6000:— | H200:~9RTX PRO 6000:— | H200:~4RTX PRO 6000:— |
Agentic inference metrics from the AgentX scenario and fixed-sequence inference metrics across models, hardware configurations, and serving parameters.
TCO $/chip/hr:
Source: SemiAnalysis Market July 2026 Pricing Surveys & AI Cloud TCO Model
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate cost per million tokens per decode chip or per prefill chip, rather than per total chip count. This makes direct token cost comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate input throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct input throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate output throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct output throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate power per decode chip or per prefill chip, rather than per total chip count. This makes direct power comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate Joules per decode chip or per prefill chip, rather than per total chip count. This makes direct Joules per token comparison with aggregated configs not an apples-to-apples comparison.
Matching measurements exist, but their chip series are hidden.
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Qwen3.5 397B 8K / 1K Total Tokens per $1 TCO vs. Interactivity