Head-to-head AI inference benchmark comparison of H200 (NVIDIA Hopper) and MI300X (AMD CDNA 3) on Qwen 3.5 397B-A17B. Latency, throughput, and cost across LLM workloads. Use the chart controls below to switch sequences, precisions, and metrics — same interactions as the main inference chart.
AgentX replays real coding-agent sessions rather than fixed-length prompts, so context grows turn over turn and most of each request is served from cache instead of being recomputed. That turns the comparison into a systems question: KV transfer between nodes, prefix-aware routing, and cache capacity all move the curve alongside raw chip throughput. Fixed-sequence workloads stay the clean baseline for kernel and silicon performance, so the two scenarios answer different questions about the same hardware. Learn more about AgentX →
Throughput at 60 tok/s/user on Qwen 3.5 397B-A17B: H200 hits 13061 tok/s/chip, MI300X hits 713. Per-million costs land at $0.03 and $0.37 respectively. H200 is 1327% cheaper per token; H200 delivers 1733% more tok/s/chip.
H200 / MI300X on Qwen 3.5 397B-A17B at 118 tok/s/user: 6635 / 713 tok/s/chip, $0.05 / $0.37 per million tokens. H200 is 625% cheaper per token; H200 delivers 831% more tok/s/chip.
Toward the upper edge of the 4–232 tok/s/user interactivity band, at 175 tok/s/user on Qwen 3.5 397B-A17B: H200 runs 3975 tok/s/chip at $0.09/M tokens, MI300X runs 713 at $0.37/M. H200 is 334% cheaper per token; H200 delivers 458% more tok/s/chip. (Numbers reflect the default agentic-traces · fp8 selection for this URL — table and chart below update if you change sequence, precision, or model in the controls.)
| Metric | Interactivity (tok/s/user) | Interactivity (tok/s/user) | Interactivity (tok/s/user) |
|---|---|---|---|
| Throughput (tok/s/chip) | H200:13061.0MI300X:712.6 | H200:6635.1MI300X:712.6 | H200:3974.7MI300X:712.6 |
| Cost ($/M tok) | H200:$0.026MI300X:$0.370 | H200:$0.051MI300X:$0.370 | H200:$0.085MI300X:$0.370 |
| tok/s/MW | H200:9533578MI300X:512683 | H200:4843174MI300X:512683 | H200:2901226MI300X:512683 |
| Concurrency | H200:~23MI300X:~4 | H200:~11MI300X:~4 | H200:~6MI300X:~4 |
Agentic inference metrics from the AgentX scenario and fixed-sequence inference metrics across models, hardware configurations, and serving parameters.
TCO $/chip/hr:
Source: SemiAnalysis Market July 2026 Pricing Surveys & AI Cloud TCO Model
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate cost per million tokens per decode chip or per prefill chip, rather than per total chip count. This makes direct token cost comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate input throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct input throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate output throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct output throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate power per decode chip or per prefill chip, rather than per total chip count. This makes direct power comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate Joules per decode chip or per prefill chip, rather than per total chip count. This makes direct Joules per token comparison with aggregated configs not an apples-to-apples comparison.
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