Head-to-head AI inference benchmark comparison of H100 (NVIDIA Hopper) and H200 (NVIDIA Hopper) on MiniMax M3 428B. Latency, throughput, and cost across LLM workloads. Use the chart controls below to switch sequences, precisions, and metrics β same interactions as the main inference chart.
AgentX replays real coding-agent sessions rather than fixed-length prompts, so context grows turn over turn and most of each request is served from cache instead of being recomputed. That turns the comparison into a systems question: KV transfer between nodes, prefix-aware routing, and cache capacity all move the curve alongside raw chip throughput. Fixed-sequence workloads stay the clean baseline for kernel and silicon performance, so the two scenarios answer different questions about the same hardware. Learn more about AgentX β
H100 / H200 on MiniMax M3 428B at 73 tok/s/user: 583 / 8926 tok/s/chip, $0.56 / $0.04 per million tokens. H200 is 1369% cheaper per token; H200 delivers 1432% more tok/s/chip.
Around the middle of the 4β281 tok/s/user interactivity band, at 143 tok/s/user on MiniMax M3 428B: H100 runs 583 tok/s/chip at $0.56/M tokens, H200 runs 7811 at $0.04/M. H200 is 1186% cheaper per token; H200 delivers 1241% more tok/s/chip.
Setting 212 tok/s/user as the target on MiniMax M3 428B, H100 produces 583 tok/s/chip ($0.56 per million tokens) and H200 produces 3892 ($0.09). H200 is 541% cheaper per token; H200 delivers 568% more tok/s/chip. (Numbers reflect the default agentic-traces Β· fp8 selection for this URL β table and chart below update if you change sequence, precision, or model in the controls.)
| Metric | Interactivity (tok/s/user) | Interactivity (tok/s/user) | Interactivity (tok/s/user) |
|---|---|---|---|
| Throughput (tok/s/chip) | H100:582.6H200:8925.9 | H100:582.6H200:7810.7 | H100:582.6H200:3892.0 |
| Cost ($/M tok) | H100:$0.558H200:$0.038 | H100:$0.558H200:$0.043 | H100:$0.558H200:$0.087 |
| tok/s/MW | H100:425237H200:6515256 | H100:425237H200:5701247 | H100:425237H200:2840858 |
| Concurrency | H100:~1H200:~14 | H100:~1H200:~11 | H100:~1H200:~4 |
Agentic inference metrics from the AgentX scenario and fixed-sequence inference metrics across models, hardware configurations, and serving parameters.
TCO $/chip/hr:
Source: SemiAnalysis Market July 2026 Pricing Surveys & AI Cloud TCO Model
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate cost per million tokens per decode chip or per prefill chip, rather than per total chip count. This makes direct token cost comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate input throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct input throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate output throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct output throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate power per decode chip or per prefill chip, rather than per total chip count. This makes direct power comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate Joules per decode chip or per prefill chip, rather than per total chip count. This makes direct Joules per token comparison with aggregated configs not an apples-to-apples comparison.
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