TPU superpod
Also known as superpod, TPU pod, Ironwood superpod, full pod
In plain English
A superpod is the largest unit of TPUs wired into one ICI network, up to 9,216 Ironwood chips that can be treated as a single machine.
Technical definition
A TPU superpod is the maximum ICI-connected domain of a TPU generation, assembled from 64-chip cubes joined through optical circuit switches; for Ironwood it reaches 9,216 chips and about 42.5 FP8 exaflops.
Engineering details
Each 4x4x4 cube of 64 chips fills one rack. Optical circuit switches link cubes while preserving torus wraparound, so the pod behaves as one large twisted torus. Because ICI bypasses the host CPU and delivers NVLink-class bandwidth across the pod, a model can be sharded across thousands of chips with tensor, expert, and data parallelism without pipeline stages. Customers rent slices of a pod rather than the whole thing, and the OCS layer lets Google route around a failed chip in seconds.
Why it matters
The pod is the reason TPU serving strategies differ from GPU ones. An NVL72 domain caps a scale-up group at 72 GPUs, while an Ironwood pod can put more than 1,000 chips in one low-latency domain, which enables ultra-wide expert parallelism and large-model disaggregation that a rack-scale NVIDIA system cannot replicate.
How to read it in InferenceX
The InferenceX Official Preview ran aggregated serving on small slices, but the article argues the pod is what will let TPUv7 disaggregated serving compete with GB200 and GB300 NVL72, with those results promised in a follow-up.