Hardware
Cube and vector cores
In plain English
Separate Ascend execution resources for matrix arithmetic and vector operations that must coordinate data movement and dependencies.
Technical definition
Cube engines perform matrix-oriented arithmetic, while vector engines handle operations such as elementwise transformations, reductions, and portions of attention or quantization.
Engineering details
A kernel can coordinate both paths and transfer intermediate results between their storage resources. Task labels such as MIX_AIC and MIX_AIV describe runtime task types; they do not establish that every elapsed cycle exclusively occupies one physical execution unit.
Why it matters
Increasing matrix throughput may leave vector work, communication, or dependent transfers unchanged. Summed kernel durations across overlapping streams therefore cannot be read directly as physical cube or vector utilization percentages.
How to read it in InferenceX
The Huawei article’s hypothetical cube-throughput improvement holds measured overlap constant. It is a composition scenario rather than a prediction for a future chip or a measurement of exclusive hardware occupancy.