Head-to-head AI inference benchmark comparison of H100 (NVIDIA Hopper) and TPU7x (Google Ironwood) on Qwen 3.5 397B-A17B. Latency, throughput, and cost across LLM workloads. Use the chart controls below to switch sequences, precisions, and metrics — same interactions as the main inference chart.
AgentX replays real coding-agent sessions rather than fixed-length prompts, so context grows turn over turn and most of each request is served from cache instead of being recomputed. That turns the comparison into a systems question: KV transfer between nodes, prefix-aware routing, and cache capacity all move the curve alongside raw chip throughput. Fixed-sequence workloads stay the clean baseline for kernel and silicon performance, so the two scenarios answer different questions about the same hardware. Learn more about AgentX →
Throughput at 118 tok/s/user on Qwen 3.5 397B-A17B: H100 hits 3745 tok/s/chip, TPU7x hits 39370. Per-million costs land at $0.09 and $0.01 respectively. TPU7x is 1094% cheaper per token; TPU7x delivers 951% more tok/s/chip.
H100 / TPU7x on Qwen 3.5 397B-A17B at 155 tok/s/user: 2882 / 36901 tok/s/chip, $0.11 / $0.01 per million tokens. TPU7x is 1354% cheaper per token; TPU7x delivers 1180% more tok/s/chip.
Toward the upper edge of the 82–228 tok/s/user interactivity band, at 192 tok/s/user on Qwen 3.5 397B-A17B: H100 runs 2274 tok/s/chip at $0.14/M tokens, TPU7x runs 34937 at $0.01/M. TPU7x is 1645% cheaper per token; TPU7x delivers 1437% more tok/s/chip. (Numbers reflect the default agentic-traces · fp8 selection for this URL — table and chart below update if you change sequence, precision, or model in the controls.)
| Metric | Interactivity (tok/s/user) | Interactivity (tok/s/user) | Interactivity (tok/s/user) |
|---|---|---|---|
| Throughput (tok/s/chip) | H100:3744.8TPU7x:39369.6 | H100:2882.3TPU7x:36901.4 | H100:2273.6TPU7x:34936.9 |
| Cost ($/M tok) | H100:$0.087TPU7x:$0.007 | H100:$0.113TPU7x:$0.008 | H100:$0.143TPU7x:$0.008 |
| tok/s/MW | H100:2733438TPU7x:32617712 | H100:2103900TPU7x:30572852 | H100:1659568TPU7x:28945197 |
| Concurrency | H100:~7TPU7x:~28 | H100:~4TPU7x:~25 | H100:~4TPU7x:~23 |
Agentic inference metrics from the AgentX scenario and fixed-sequence inference metrics across models, hardware configurations, and serving parameters.
TCO $/chip/hr:
Source: SemiAnalysis Market July 2026 Pricing Surveys & AI Cloud TCO Model
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate cost per million tokens per decode chip or per prefill chip, rather than per total chip count. This makes direct token cost comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate input throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct input throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate output throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct output throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate power per decode chip or per prefill chip, rather than per total chip count. This makes direct power comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate Joules per decode chip or per prefill chip, rather than per total chip count. This makes direct Joules per token comparison with aggregated configs not an apples-to-apples comparison.
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