Head-to-head AI inference benchmark comparison of GB200 NVL72 (NVIDIA Blackwell) and TPU7x (Google Ironwood) on Qwen 3.5 397B-A17B. Latency, throughput, and cost across LLM workloads. Use the chart controls below to switch sequences, precisions, and metrics — same interactions as the main inference chart.
AgentX replays real coding-agent sessions rather than fixed-length prompts, so context grows turn over turn and most of each request is served from cache instead of being recomputed. That turns the comparison into a systems question: KV transfer between nodes, prefix-aware routing, and cache capacity all move the curve alongside raw chip throughput. Fixed-sequence workloads stay the clean baseline for kernel and silicon performance, so the two scenarios answer different questions about the same hardware. Learn more about AgentX →
At 162 tok/s/user on Qwen 3.5 397B-A17B, GB200 NVL72 delivers 57790 tok/s/chip at $0.01 per million tokens; TPU7x hasn't been benchmarked at this target.
GB200 NVL72 hits 23945 tok/s/chip for $0.02 per million tokens at 280 tok/s/user on Qwen 3.5 397B-A17B. No TPU7x data at this operating point.
GB200 NVL72: 9736 tok/s/chip, $0.05 per million tokens at 399 tok/s/user on Qwen 3.5 397B-A17B. TPU7x is unmeasured here. (Numbers reflect the default agentic-traces · fp4 selection for this URL — table and chart below update if you change sequence, precision, or model in the controls.)
| Metric | Interactivity (tok/s/user) | Interactivity (tok/s/user) | Interactivity (tok/s/user) |
|---|---|---|---|
| Throughput (tok/s/chip) | GB200 NVL72:57790.4TPU7x:— | GB200 NVL72:23945.3TPU7x:— | GB200 NVL72:9735.8TPU7x:— |
| Cost ($/M tok) | GB200 NVL72:$0.009TPU7x:— | GB200 NVL72:$0.022TPU7x:— | GB200 NVL72:$0.053TPU7x:— |
| tok/s/MW | GB200 NVL72:30903968TPU7x:— | GB200 NVL72:12804969TPU7x:— | GB200 NVL72:5206314TPU7x:— |
| Concurrency | GB200 NVL72:~22TPU7x:— | GB200 NVL72:~14TPU7x:— | GB200 NVL72:~6TPU7x:— |
Agentic inference metrics from the AgentX scenario and fixed-sequence inference metrics across models, hardware configurations, and serving parameters.
TCO $/chip/hr:
Source: SemiAnalysis Market July 2026 Pricing Surveys & AI Cloud TCO Model
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate cost per million tokens per decode chip or per prefill chip, rather than per total chip count. This makes direct token cost comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate input throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct input throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate output throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct output throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate power per decode chip or per prefill chip, rather than per total chip count. This makes direct power comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate Joules per decode chip or per prefill chip, rather than per total chip count. This makes direct Joules per token comparison with aggregated configs not an apples-to-apples comparison.
Matching measurements exist, but their chip series are hidden.
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Qwen3.5 397B 8K / 1K Total Tokens per $1 TCO vs. Interactivity